In the related art, a CPU of a computer connected to a network may spend a high portion of its time, processing network communications and leaving less time available for other tasks.
Typically, a significant amount of tasks handled by a computer network include demands for moving data records between the network devices and storage devices. Traditionally, such data is segmented into packets (or segments) and send from a source node (computer) to a receiving node (computer). Such a transportation over the network involved each packet being encapsulated in layers of control information that are processed one layer at a time by the CPU of the receiving node. Although the speed of CPUs has constantly increased, this protocol processing of network messages such as file transfers can consume a significant amount of the available processing power of even the fastest commercially available CPU.
Reference is now made to FIG. 1 which illustrates a schematic diagram of a networked storage system 100 in a related art. System 100 includes a host 110 connected to network 130, through a network controller (NC) 120. Host 110 is connected to the NC 120 by an I/O bus 140, such as a peripheral component interconnect (PCI) bus. System 100 further includes storage device 150 connected to the I/O bus 140 through an I/O controller 160. Storage device 150 may be a disk drive, a collection of disk drives, a redundant array of independent disks (RAID), and the like.
Both host 110 and NC 120 include memories 115 and 125 respectively. Local memory 125 and host memory 115 may be composed of dynamic random access memory (DRAM), static random access memory (SRAM), and other forms of memory. Host 110 includes a CPU and internal memory (not shown), for controlling various tasks, including a file system and network messages processing.
It should be noted that in a related art, NC 120, host 110, I/O controller 160, and I/O bus 140 could be integrated in Storage Target system 180.
Following is an example illustrating a data flow from a source computer 170 to a storage device 150, through network system 100 in a related art. Source computer 170 initiates the data transmission by sending a write data request to Storage Target system 180. Source computer 170 writes data records (e.g., a file, a portion of file) that are typically larger than the size of packets transmitted over network 130. Hence, source computer 170, using a transport control protocol (TCP) layer mechanism, segments the data records to smaller size segments, as dictated by the network protocols. Segments then need to be reassembled to data records by the TCP layer mechanism in host 110, before they can be written to storage 150.
FIG. 2 shows an example of a segmentation process in a related art where data record 220 is segmented into five segments 210-1 through 210-5. As can be seen in FIG. 2, the segmentation process is not deterministic. In other words, the segmentation process may result in a single record being segmented into a large number of variable sized segments. Conversely, a segment may include data from more than one record. For example, in FIG. 2 segments 210-1 and 210-5 include data from different records.
Segments transmitted from the source computer 170 through the network 130 are received in NC 120. NC 120 processes the TCP layer and reassembles the segments into data records. The reassembled records are then stored in local memory 125. In order to present the records efficiently to I/O controller 160, private data buffers are allocated in host memory 115. A separate private buffer is associated with each incoming record. Host 110 may allocate private buffers in different sizes, where the size of a buffer is determined according to host 110 resources or configuration.
For each allocated private buffer, host 110 indicates the buffer size and its address. Reassembled records are then sent directly by NC 120 to the host memory's 115 buffers, normally using a direct memory access (DMA). After reassembling the record into a private buffer, the record is sent from host memory 115 back over the I/O bus 140 to I/O controller 160 to be stored in storage 150. Thus, a record that has been sent to a host computer from a network for storage requires a double-trip across an already congested I/O bus.
A method for eliminating the double-trip across the I/O bus is disclosed in U.S. patent application Ser. No. 09/970,124. In the '124 application, packets sent from source computer 170 are first received at NC 120 and saved in local memory 125. NC 120 performs link layer processing such as verifying that the packet is addressed to host 110. The received packets are reassembled to a record by copying the packets from local memory 125 to a cache file located at local memory 125. Once the record reassembly is complete, the cache file is sent to I/O controller 160 by DMA. Although, this method eliminates the double-trip across I/O bus 140, it requires copying data from a first location in local memory 125 to a second location in local memory 125 to achieve the normalization of the received segments.